Superscalar Encrypted RISC Measure of a Secret Computer

Modifying the arithmetic embedded in a processor can cause data to remain in encrypted form throughout processing. The theory has been prototyped in a superscalar pipelined general purpose processor that ‘works encrypted’, a new approach to encrypted computation that is reported here. The prototype runs encrypted machine code on encrypted data in registers and memory and on buses. The objective is to protect user data against the operator, and ‘Iago’ attacks in general, for those computing paradigms that entail trust in dataoriented computation in remote locations, overseen by untrusted operators, or embedded and unattended. The modified architecture is 32-bit OpenRISC. It admits any block cipher compatible with the physical word size. We are reporting performance from cycle-accurate behavioural simulations running AES-128 (symmetric, keyed; the US Advanced Encryption Standard) and Paillier-72 (asymmetric, additively homomorphic, no key in-processor) encryptions in a 128-bit word, and RC2-64 encryption (symmetric, keyed) in 64 bits.